• CERN FPGA meeting

    From =?UTF-8?Q?Niocl=C3=A1is=C3=ADn_C=C3@3:633/280.2 to All on Wed May 28 19:47:25 2025
    I love this sentence: "You don't have time to not do good things." says
    Jim Lewis at circ 21:54 in
    HTTPS://CDS.CERN.CH/record/2932949
    I am glad that the SystemC(R) percentages on Slide 5 / Page 3 are still
    small bt the 2024 SystemC(R) percentage is disturbingly high! Cf.
    "Why Your Team Should be Using VHDL + OSVVM for Verification" by Jim
    Lewis. Thanks to Jim for not parroting off about object orientation on
    Slide 10 / Page 5. "Aspects of a Test Sequencer
    * Whole test in one file" says Slide 18 / Page 9: even the Gang of Four confesses that scattering polymorphic methods throughout makes OOP code
    hard to comprehend. I am glad to note that other VHDL presentations are hyperlinked to from HTTPS://Indico.CERN.CH/event/1467417/timetable/?view=standard

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