1. Forum
  2. Fidonet
  3. COMP.ARCH.FPGA
Re: Richard Stallman is responsible for the shrinking economy

By =?UTF-8?Q?Niocl=C3=A1s_P=C3=B3l_Cai on Tue Jul 16 09:28:47 2024

Latest reply by =?UTF-8?Q?Niocl=C3=A1s=C3=A1n_Caile on Tue Oct 15 06:54:37 2024
configuring an Efinix T20

By john larkin on Sat Sep 7 08:50:28 2024

Latest reply by Lasse Langwadt on Thu Sep 12 08:44:35 2024
Re: A Simple VHDL Abstraction of an Efficient Clock Prescaler Using Ca

By =?UTF-8?Q?Niocl=C3=A1s_P=C3=B3l_Cai on Mon Jul 22 02:16:53 2024

Latest reply by =?UTF-8?Q?Niocl=C3=A1s_P=C3=B3l_Cai on Thu Aug 8 04:51:47 2024
Re: Innervator: Hardware Acceleration for Neural Networks

By Fereydoun Memarzanjany on Wed Aug 7 15:02:10 2024

Latest reply by Fereydoun Memarzanjany on Wed Aug 7 15:02:10 2024
Journal of Scientific Practice and Integrity

By =?UTF-8?Q?Niocl=C3=A1s_P=C3=B3l_Cai on Sun Jul 21 08:52:40 2024

Latest reply by =?UTF-8?Q?Niocl=C3=A1s_P=C3=B3l_Cai on Sun Jul 21 08:52:40 2024
buy online research chemicals

By obstruckspare@gmail.com on Fri Dec 15 06:08:45 2023

Latest reply by obstruckspare@gmail.com on Fri Dec 15 06:08:45 2023
Re: Too much spam

By Richard Damon on Thu Oct 5 02:38:17 2023

Latest reply by Gabor on Mon Oct 16 07:13:04 2023
Re: Buy currency bills Japan - undetectable fake money for sale - What

By scott scott on Tue Sep 5 15:54:43 2023

Latest reply by scott scott on Tue Sep 5 15:54:48 2023
How to define multi-cycle timing constraints in Lattice iCEcube2 (synp

By Stef on Wed Jul 12 01:51:00 2023

Latest reply by gnuarm.del...@gmail.com on Wed Jul 19 17:59:14 2023
=?UTF-8?Q?Download_WooLentor_Pro_=E2=80=93_WooCommerce_Page_Builder_?=

By Lizany Abonita on Sun Jul 9 21:37:46 2023

Latest reply by Lizany Abonita on Sun Jul 9 21:37:46 2023
Vending Machine

By Esma on Fri Jun 16 04:15:16 2023

Latest reply by gnuarm.del...@gmail.com on Fri Jun 16 15:06:43 2023
Foundation 1.3/XactStep 6 dongles and licensing

By robert on Mon Jun 5 06:42:11 2023

Latest reply by robert on Mon Jun 5 06:42:11 2023
Embedding a Checksum in an Image File

By gnuarm.del...@gmail.com on Thu Apr 20 12:10:28 2023

Latest reply by Michael Schwingen on Fri Apr 21 05:51:47 2023
Re: Old versions of quartus

By Namazi Azhari on Sat Feb 18 16:19:55 2023

Latest reply by Namazi Azhari on Sat Feb 18 16:19:55 2023
Excess 3 Adder: Add 2 three digits numbers in excess 3.

By Virulog_X on Wed Dec 14 23:49:10 2022

Latest reply by KJ on Sun Dec 18 08:05:13 2022
Disabled generate gives compile error in Modelsim

By Stef on Fri Dec 9 22:20:09 2022

Latest reply by KJ on Mon Dec 12 09:13:51 2022
Trion bitstream compression test

By John Larkin on Sun Dec 11 14:13:24 2022

Latest reply by Dimiter_Popoff on Mon Dec 12 03:16:41 2022
Re: All my PDF files suddenly become Chrome HTML Document! Why?

By Jason Whitlow on Thu Aug 25 10:04:40 2022

Latest reply by Lanre Itabiyi on Sat Dec 10 04:47:43 2022
Where can I find solutions to my problems?

By JAMMY Anderson on Sat Dec 10 00:40:01 2022

Latest reply by JAMMY Anderson on Sat Dec 10 00:40:01 2022
efinix bit stream question

By John Larkin on Sun Nov 27 15:34:23 2022

Latest reply by John Larkin on Tue Dec 6 02:27:52 2022
Developing older Xilinx FPGA and CPLD XC3S500E

By Cy Drollinger on Thu Dec 1 08:54:17 2022

Latest reply by Gabor on Fri Dec 2 12:10:38 2022
Forcing Synopsys to use only DFFs

By Chris Johnson on Fri Oct 21 03:49:59 2022

Latest reply by gnuarm.del...@gmail.com on Sat Oct 22 03:53:48 2022
Renesas has a 1 kLUT FPGA!

By gnuarm.del...@gmail.com on Mon Oct 10 15:14:35 2022

Latest reply by gnuarm.del...@gmail.com on Tue Oct 11 02:24:05 2022
Renesas GreenPAK Sales/FAE Support

By gnuarm.del...@gmail.com on Mon Oct 10 09:38:09 2022

Latest reply by gnuarm.del...@gmail.com on Mon Oct 10 09:38:09 2022
32-bit Z8000 the Z80,000 and Z80320 Microprocessor

By Nathan Brown on Thu Oct 6 10:52:01 2022

Latest reply by Nathan Brown on Thu Oct 6 10:52:01 2022
Intel announces new FPGA families

By Claudio Avi Chami on Fri Sep 30 02:05:06 2022

Latest reply by Theo on Sun Oct 2 00:19:26 2022
Research Assistantship at the Graduate School, Dept. of Computer Engin

By jg.lee on Mon Sep 26 15:17:33 2022

Latest reply by jg.lee on Mon Sep 26 15:17:33 2022
Magellan VHDL monitor for Basys 3 board

By Claudio Avi Chami on Sat Sep 24 18:36:26 2022

Latest reply by Claudio Avi Chami on Sat Sep 24 18:36:26 2022
Last CFP: 22nd International Conference on Hybrid Intelligent Systems

By Anu Bajaj on Fri Sep 9 14:36:22 2022

Latest reply by Anu Bajaj on Fri Sep 9 14:36:22 2022
Wide frequency range, arbitrary waveform DDS

By Stef on Wed Aug 17 01:37:34 2022

Latest reply by gnuarm.del...@gmail.com on Wed Aug 24 09:52:05 2022
Re: Efinix FPGA

By Clifford Heath on Thu Aug 18 09:33:42 2022

Latest reply by Clifford Heath on Thu Aug 18 09:33:42 2022
2nd CFP: 18th International Conference on Information Assurance and Se

By Dr.Aswathy SU on Sun Aug 7 18:31:13 2022

Latest reply by Dr.Aswathy SU on Sun Aug 7 18:31:13 2022